Media Advisory: News Briefing to Focus on Successful Implementations of Advanced Low-Power Design Techniques
Posted on: Wednesday, 19 September 2007, 18:00 CDT
Cadence Design Systems (NASDAQ: CDNS)
WHAT
Press is invited to hear members of the Power Forward Initiative (PFI) showcase the progress made in advanced low-power IC design, one of today's biggest industry challenges. Members will share their successes and experiences in low-power product development. Journalists will get an up-to-date report on the growing adoption of and ecosystem support for the Common Power Format and advanced low-power design methodologies.
WHO
Karl Aucker, director of Strategic Alliances at ARC; Chi-Ping Hsu, corporate vice president, IC Digital and Power Forward at Cadence Design Systems, Inc.; Milind Padhye, low-power design manager at Wireless Design Organization, Freescale Semiconductor; Tatsuya Nakae, senior staff engineer, SoC Design Engineering Center, Fujitsu Micro Electronics America, Inc.; and Steve Schulz, president and CEO of Si2.
WHEN
Oct. 2, 2007, 10:30 a.m. to 11:50 a.m. followed by lunch and discussions/interviews with presenters.
WHERE
The Executive Briefing Center, Kadinski Room at Cadence Design Systems, 2655 Seely Ave., Bldg. 9, San Jose, Calif., 95134
HOW TO REGISTER
Please RSVP by emailing Michael Fournell at fournell@cadence.com or calling 408-428-5135.
Contact: Michael Fournell fournell@cadence.com 408-428-5135
SOURCE: Cadence Design Systems, Inc.
Source: MARKET WIRE
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