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BittWare Announces 6U OpenVPX System for Electronic Warfare and Radar Development Featuring Dual Altera Stratix V GX FPGAs and High Speed Data Conversion

September 20, 2013

2U rackmount enclosure comes fully tested and configured with Altera Stratix V GX FPGA COTS board and ADC and DAC FMCs creating a solid platform for time-critical application development.

London, UK (PRWEB) September 20, 2013

BittWare, the leader in Altera-based FPGA COTS boards, announced today at DSEI, the world leading defense and security event the availability of their Electronic Warfare (EW) and Radar Development System. The single-slot 2U OpenVPX system features BittWare’s S5-6U-VPX (S56X) FPGA COTS board based on the high-density Altera Stratix® V GX and GS FPGAs and two VITA-57 FPGA Mezzanine Cards (FMCs) with direct data connections to the on-board FPGAs: an ADC FMC (A/D Converter) providing up to four 8-bit A/D channels at 1.25 to 5 GSPS, and a DAC FMC (D/A Converter) providing two 14-bit D/A channels at 5.6 GSPS. Along with the dual Stratix V FPGAs, the 6U VPX board also contains an ARM Cortex-A8 for control plane interface and processing, The EW & Radar Development System provides a complete, fully-tested and configured Stratix V development environment with high-speed data conversion ideal for time-critical military applications.

“Our military customers have many varied system requirements, but at a base level, their needs are consistent – high-density programmable logic and high-speed data conversion, all accessible via a rugged VPX backplane,” stated Chad Hamilton, Vice President of Value-Add IP at BittWare. “Our newest development system satisfies these needs with a Stratix V-based VPX COTS board complete with high speed A/D and D/A direct to the FPGA, all in a 2U VPX rackmount/desktop enclosure. The system provides a highly configurable, tested system on which our military customers can develop their time-sensitive applications, giving them a jump on the competition.”

“Altera is pleased to partner with BittWare to offer a system-ready electronic warfare and radar platform”, said Ian Land, senior manager, Military and Aerospace products at Altera. “BittWare has provided a robust 6U VPX card powered by Stratix V, Altera’s most recent floating-point FPGA family. It combines high-speed ADC and DAC daughter cards so customers can develop advanced radar systems quickly. Altera will use this platform for our next-generation signal processing seminar which demonstrates a channelizer on BittWare’s Stratix-based VPX platform.”

With complete software support including BittWare’s ATLANTiS FrameWork, which enables reconfigurable data routing, the development system allows users to fully design and debug in a flexible environment. Hardware-in-the-loop support for Simulink provides an additional layer of flexibility, allowing rapid control prototyping and other real-time testing.

About the EW & Radar Development System

The development platform includes BittWare’s S5-6U-VPX (S56X), which features two Altera Stratix V GX or GS FPGAs. The S56X board supports BittWare’s ATLANTiS FrameWork (AFW) for control of I/O, routing, and processing. The board’s two VITA-57 FMC interfaces support additional I/O and processing cards. The S56X also features an ARM Cortex-A8 control processor for control plane interface and processing, extensive on-board memory, and I/O interfaces including GigE, SerDes, LVDS, JTAG, and RS-232.

An S56X rear transition module is included to provide convenient rear panel I/O access, including 8 QSFP connectors for high-speed serial access, along with SFP, PCIe, GigE, SATA, JTAG, and LVDS. A debug breakout board also provides front-panel access via USB, JTAG, RS-232, and Ethernet

The development system includes two VITA-57 FMCs for high bandwidth data transfer to and from the FPGAs on the S56X board. An ADC FMC provides 1, 2, or 4 8-bit A/D channels at up to 5 GSPS, directly to one of the S56X FPGAs. A DAC FMC provides 2 14-bit D/A channels at 5.6 GSPS, directly to the second FPGA on the S56X.

The development system includes a 19” rackmount enclosure with a VITA 46/65 compliant single-slot VPX backplane, featuring high-speed multi-gig connectors J0-J6. The 2U high chassis accommodates one 6U x 160 mm board and includes a 250W Power-One power supply. It provides integrated cooling with two 12 VDC fans and side-to-side airflow, and includes an advanced EMI shielding package.

EW & Radar Development System Specifications

19” 2U rackmount

Single-slot VITA 46.1 backplane

BittWare S5-6U-VPX

Two Altera Stratix V GX or GS FPGAs implementing BittWare ATLANTiS FrameWork

48 multi-gigabit transceivers

Additional I/O: LVDS, GigE, 10/100 Ethernet, RS-232, JTAG

High-speed A/D: 1, 2, or 4 channels 8-bit, up to 5 GSPS

High-speed D/A: 2 channels 14-bit, up to 5.6 GSPS

Optional rear transition module with 8 QSFP, 2 SFP, 2 RJ-45, JTAG, PCIe x1, SATA, and Ref Clk input

Optional debug I/O breakout board with USB, JTAG, RS-232, and Ethernet access

BittWorks II Toolkit providing host, command, and debug tools for BittWare hardware

ATLANTiS FrameWork FPGA framework for Altera Stratix V FPGAs

Altera Quartus II tools for Stratix V FPGAs

EW & Radar Development System Availability

BittWare’s EW & Radar Development System is currently shipping and available today.

About BittWare, Inc.

For 25 years, BittWare has designed and deployed high-end signal processing board-level solutions that significantly reduce technology risk and time-to revenue for our OEM customers. Our solutions are exclusively based on the latest FPGA technology from Altera and industry-standard COTS form factors including PCIe, VPX / OpenVPX, AMC, XMC and FMC (VITA 57). When power and space-constrained challenges make it difficult to use industry-standard boards, BittWare can provide modified solutions, and/or licensed designs for applications in the military/aerospace, financial, communications/networking and high performance computing markets. For more information on BittWare and its innovative FPGA COTS solutions, visit http://www.bittware.com.

For the original version on PRWeb visit: http://www.prweb.com/releases/2013/9/prweb11143143.htm


Source: prweb



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