Last updated on April 19, 2014 at 13:20 EDT

Altera Expert on Jitter and SERDES Architectures Elected IEEE Fellow

December 15, 2011

SAN JOSE, Calif., Dec. 15, 2011 /PRNewswire/ — Altera Corporation (Nasdaq: ALTR) today announced the IEEE elected Dr. Mike Peng Li to IEEE Fellow. Dr. Li, research and development architect and engineer at Altera, was recognized for his contributions to the design of jitter test technologies.

(Logo: http://photos.prnewswire.com/prnh/20101012/SF78952LOGO)

Dr. Li’s accomplishments have shaped and advanced the industry’s understanding of jitter fundamentals in modern electro-optical devices and systems, as well as technologies used to validate and test jitter to ensure the performance and reliability. As a result of his contributions to the semiconductor industry, the IEEE recognized Dr. Li with their highest level of membership.

“Altera fosters a culture of innovation that allows us to tackle some of the most complex engineering challenges in the gigahertz and terahertz era,” said Bill Hata, senior vice president of worldwide operations and engineering at Altera. “Today’s high-speed, leading-edge devices require that we create new techniques to solve unique problems. Mike’s expertise in the areas of jitter, high-speed link and SERDES architectures has enabled Altera to push the envelope with our products and technologies and his election to IEEE Fellow is well deserved.”

Dr. Li has consistently promoted the advancement of high-speed I/O (HSIO) and jitter quantification and testing technologies, emphasizing the development of techniques for multiple to several 10s GHz/Gbps signal/jitter test/analysis systems. He has been a pioneer in developing modern jitter theory and related modeling and test methodologies. Dr. Li has authored two books, more than 50 publications, 20 patents granted and pending, and is a lead contributor to the HSIO and jitter standards documents. These works support fast HSIO technology advancements, providing solutions to some of the most challenging problems in testing, modeling, and analysis for jitter, noise, and signals at high-speed that requires comprehensive and accurate theory, models, algorithms, and high-performance hardware and systems.

About the IEEE and IEEE Grade of Fellow

The IEEE Grade of Fellow is conferred by the IEEE Board of Directors upon a person with an outstanding record of accomplishments in any of the IEEE fields of interest. The total number selected in any one year cannot exceed one-tenth of one-percent of the total voting membership. IEEE Fellow is the highest grade of membership and is recognized by the technical community as a prestigious honor and an important career achievement. 329 individuals have been elevated to IEEE Fellow for 2012.

The IEEE is the world’s leading professional association for advancing technology for humanity. Through its 385,000 members in 160 countries, the association is a leading authority on a wide variety of areas ranging from aerospace systems, computers and telecommunications to biomedical engineering, electric power and consumer electronics. If you would like to learn more about IEEE or the IEEE Fellow Program, please visit www.ieee.org.

About Altera

Altera® programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera’s FPGA, CPLD and ASIC devices at www.altera.com. Follow Altera via Facebook, RSS and Twitter.

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/legal.

Editor Contact:
Steve Gabriel
Altera Corporation
(408) 544-6846

SOURCE Altera Corporation

Source: PR Newswire