Absolute Analysis Introduces Revolutionary Mid-bus Probing Technology for Testing Multi-Lane Serial Designs
The Solution Creates a Single PCB Touch point for protocol analyzers, logic analyzers and oscilloscopes for Serial RapidIO and PCI Express Designs
Newbury Park, CA (PRWEB) May 09, 2012
Absolute Analysis today announced the release of the Embedded Systems Probe (ESP) designed to connect to a mid-bus probe connector to monitor serial signals across backplanes using Serial RapidIO and PCI Express. This ground breaking technology effectively uses one “touch-point” on the device under test to distribute the signal to multiple pieces of test equipment simultaneously. This means that for the first time, engineers can simultaneously look at signal integrity issues on a scope, timing information on a logic analyzer, and protocol decodes on the Investigator protocol analyzer.
Designed for use with multi-lane serial designs, the ESP is designed with innovative circuitry to minimize disturbance. It utilizes a matched impedance touch, so signal integrity is preserved, and the device under test can be validated under operating conditions as close to normal as possible. Even with amplitudes as low as 100mV, the ESP can effective read the signal under test.
“Our new Embedded Systems Probe takes validation high speed serial links to a new level,” says Dennis Murphy, CEO of Absolute Analysis. “Engineers are now able to use our protocol analysis tools to trigger on an error, and simultaneously see the error on the protocol trace, an oscilloscope, and a logic analyzer.”
Hardware engineers can also define parameters on each lane of a multi-lane design. Any individual lane can be defined individually for port number, lane definition and direction. The lanes are monitored real-time for voltage amplitude. The software included allows the user to define which pins on the mid-bus probe correspond to which lanes on the logical layer.
The ESP contains different modes of operation, depending upon the type of testing required by the user. There is a receive-only mode in which signals are only received from the device. A second mode is an interpose mode, where the ESP sits in the middle of a traffic stream and retransmits the incoming data back out onto the line. Finally, there is also a generate mode which facilitates using Investigator for Serial RapidIO as an end device which can generate Serial RapidIO traffic to the devices under test.
The Embedded Systems Probe is available today with oscilloscope interface output ports. The logic analyzer interface is schedule to be available in Q3, 2012. More information about the product can be found on the product page: http://www.absoluteanalysis.com/products/application-a-utility-software/embedded-systems-probe.html
About Absolute Analysis
Absolute Analysis develops test equipment that performs complete high speed serial bus verification and validation across standard protocols, custom or proprietary protocols, and mixed protocol environments. Protocol support includes Serial RapidIO, PCI Express, CPRI, OBSAI, Fibre Channel, Ethernet up to 10 Gbps, and many others. Their product lines allow engineers to perform a variety of protocol level tests, including protocol analysis, traffic generation, BER testing, error injection, and impairment testing. All verification is accomplished via a single piece of hardware, and a single user interface, saving customers both time and money.
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