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MediaTek Adopts Synopsys PrimeTime SI for Timing and Signal Integrity Signoff

May 13, 2009

Integrated Static Timing and SI Analysis Solution Delivers High Performance and Signoff Accuracy

MOUNTAIN VIEW, Calif., May 13 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that MediaTek Inc., a leading fabless semiconductor company for wireless communications and digital multi-media solutions, has adopted Synopsys’ PrimeTime(R) SI solution for static timing analysis (STA) and signal integrity (SI) signoff. MediaTek selected the Synopsys PrimeTime SI solution to streamline the signoff flow for its new cutting-edge system-on-chip (SoC) designs targeted at 65-nanometer (nm) and below process technologies. In an effort to consolidate signoff tools at its global design centers, MediaTek did a thorough evaluation and selected the Synopsys PrimeTime SI solution because of its simple, widely deployable flow that delivered high performance and accuracy within 5 percent of HSPICE(R) simulation.

“Our leading-edge SoC solutions require a trusted signoff tool that can be easily deployed and supported throughout our global design facilities,” said MediaTek. “We selected PrimeTime SI because it is built on the trusted PrimeTime STA foundation and the tool offers comprehensive and accurate signal integrity analysis in a simple, streamlined flow.”

PrimeTime SI extends the trusted PrimeTime STA and signoff environment to incorporate crosstalk delay and noise (glitch) analysis using the latest Composite Current Source (CCS) library models. PrimeTime is the leading timing signoff solution and is considered the de-facto standard for high-accuracy static timing analysis with the capacity and performance for 100+ million-instance chips being designed at 65-nm and below. PrimeTime SI offers a unified approach of signal integrity and timing analysis that delivers a comprehensive and time-efficient method to concurrently analyze noise and crosstalk delay effects on timing. This approach delivers faster results than separate solutions while improving designer productivity by enabling quick debugging of complex timing and signal integrity problems in the same tool to speed design closure.

“Leading semiconductor companies see great value in having a trusted tool to perform both STA and SI signoff,” said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. “PrimeTime SI offers a simple, unified, tapeout-proven signoff environment which helps significantly improve design efficiency and productivity.”

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Synopsys, HSPICE, and PrimeTime are registered trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

    Editorial Contact:

    Sheryl Gulizia
    Synopsys, Inc.
    650-584-8635
    sgulizia@synopsys.com

    Lisa Gillette-Martin
    MCA, Inc.
    650-968-8900 ext. 115
    lgmartin@mcapr.com

SOURCE Synopsys, Inc.


Source: newswire



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