Novellus' Peter Wolters Division Develops 22nm Double-Sided Silicon Wafer Polish Process
Posted on: Tuesday, 23 June 2009, 15:05 CDT
MicroLine(R) Technology Produces Extremely Flat Wafers to Meet Chip Manufacturing Lithography Requirements at 22nm And Beyond
(Photo: http://www.newscom.com/cgi-bin/prnh/20090623/AQ36601)
With current state-of-the-art semiconductor manufacturers beginning to enter 32nm high-volume manufacturing, leading manufacturers of wafer polishing equipment are already considering the planarity requirements for silicon wafers at the 22nm technology node. At these next generation nodes, extremely tight requirements are being placed on both the shape of the prime wafer and the flatness of its surface. Since semiconductor device structures are patterned using optical lithography, the achievable process window or depth of focus becomes governed by the flatness of the area being exposed by the optical beam. The "degree of silicon wafer local flatness" as measured by the Site Frontside Least Squares Focal Plane Range metric (or SFQR, see Figure 1) defines the acceptable level of silicon wafer surface planarity for use in advanced IC manufacturing. Lithography processes require the SFQR value to be much smaller than the depth of focus. To meet the current needs of 32nm lithography, the SFQR-max value is typically less than 30nm for a site size of 26 mm x 8 mm with an edge exclusion of 2 mm. A double-sided silicon wafer polish is required to achieve low SFQR values at these advanced nodes. Another significant challenge during the polishing step is to control wafer planarity (parallel front and back wafer surfaces) while preventing the pad from rounding the edge of the wafer.
"The in-situ data obtained by the MicroLine's temperature and eddy current sensors allow us to adjust the process parameters to match the polishing consumables with the incoming wafer geometry," said
For more information on Peter Wolters' double-sided prime wafer polishing technology, go to www.NovellusTechNews.com.
About
Peter Wolters GmbH, a component of Novellus' Industrial Applications group, is a leading manufacturer of high precision surface polishing systems for substrates made of silicon, sapphire, gallium arsenide, silicon carbide and other materials used in the manufacturing of microelectronic, micro-optical, and micromechanical devices. The company's AC-1500 P3 and AC-2000 P3 double sided polishing systems provide world class process results in terms of local and global geometry control (SFQR, GBIR) and haze removal.
About Novellus:
Novellus Systems, Inc. (Nasdaq: NVLS) is a leading provider of advanced process equipment for the global semiconductor industry. The company's products deliver value to customers by providing innovative technology backed by trusted productivity. An S&P 500 company, Novellus is headquartered in
SOURCE Novellus Systems, Inc.
Source: PR Newswire
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