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IPFlex Starts Taking Orders for FFT Development Kit, Enabling Quick Development of Dynamically Reconfigurable FFT Systems

Posted on: Tuesday, 11 October 2005, 15:00 CDT

TOKYO, Oct. 11 /PRNewswire/ -- IPFlex Inc. today announced it will start taking orders for the IPFlex FFT Development Kit which enables rapid development of dynamically reconfigurable FFT systems. Leveraging on the DAPDNA(R)-2's(Note1) unique dynamic reconfiguration capabilities, users can develop systems where Fast Fourier Transforms (FFT) and Inverse Fast Fourier Transforms (IFFT) of varied point lengths and bit precisions are dynamically switched according to the environment.

In addition to an optimized FFT library, the Development Kit includes the DAPDNA-FW II Integrated Development Environment software, a DAPDNA-EB4 evaluation board, PCI driver software, etc.

This Development Kit allows users to take advantage of the high processing performance, flexibility, and expandability of the DAPDNA-2 processor to develop and validate on the actual hardware systems utilizing FFT/IFFT as essential components.

Background of the FFT Development Kit

FFTs are used in a broad range of fields including image processing, wireless, biomedical, and scientific research. To develop a system that utilizes FFTs, a user would make use of simulation software to investigate the number of points that will be optimal to the system, then develop and validate the actual system architecture, including FFT, on an evaluation board.

IPFlex developed the FFT Development Kit to make this process easier and more convenient. The features of the DAPDNA-2 allow the circuit configuration within the chip to be reconfigured instantly to dynamically switch between FFTs and IFFTs with the optimum number of points, to facilitate efficient system development and validation.

Features of the FFT Development Kit -- High performance FFT library The 166 MHz DAPDNA-2 processor, with its ability to be reconfigured dynamically in just nanoseconds, as well as its massive parallel processing capability, provides high performance with unmatched flexibility and expandability. -- Customizability Each of the functional blocks that make up the FFT calculation (butterfly computation, reordering, I/O, bit reversal, etc.) are customizable. The user can assemble these blocks, which are provided with the Development Kit, to create any arbitrary FFT or IFFT. -- Reduction in design and development steps The FFT Development Kit includes a PCI-enabled DAPDNA-EB4 Evaluation Board. Users can implement FFT, IFFT, or any other algorithm directly on the DAPDNA-EB4 Evaluation Board. A complete evaluation and development environment for rapid development of user systems is provided. FFT Development Kit components DAPDNA-FW II Integrated Development Environment (choose from one of the following versions) -- Designer Version (GUI based) -- Full Version (includes DFC compiler*) -- MATLAB(R)/Simulink(R) Version** Includes one-year license FFT library FFT, IFFT, and individual functional blocks DAPDNA-EB4 Evaluation Board Includes Windows XP file transfer utility PCI driver software For Windows XP, Red Hat Linux Documentation Users' Manual, etc. * DFC compiler creates DAPDNA object code from code written in DFC (Data Flow C). ** Contact IPFlex at the address below for information on the release date of the MATLAB/Simulink Version. About the DAPDNA-2 Dynamically Reconfigurable Processor

DAPDNA-2 is a dual-core processor, comprised of a high-performance RISC processor core, called the DAP, and the dynamically reconfigurable core, DNA, a two-dimensional array of 376 processing elements (PEs). DAPDNA-2 can change its hardware configuration to provide the optimal circuitry for an application on demand. This configuration change can take place not only when the system is designed, but also during operation, dynamically, in a single clock cycle(Note2), to meet the instantaneous change in needs of applications implemented by the system.

Terminology (Note1) DAPDNA: Digital Application Processor, Distributed Network Architecture (Note2) a single clock cycle: One clock switching operation is possible by creating configuration information beforehand and storing in the background configuration banks. About IPFlex

IPFlex Inc. is a fabless semiconductor company established in March 2000. IPFlex supplies high performance, multifunctional processors that are dynamically reconfigurable, and also provides development software, evaluation boards, and peripheral interface products for the processors. With its DAPDNA- 2 dynamically reconfigurable processors and Software to Silicon(R)-based DAPDNA-FW II Integrated Development Environment software, IPFlex provides solutions to shorten development cycle and to respond quickly to the changes in applications.

Editors' note: IPFlex(R), DAPDNA(R), and Software-to-Silicon(R) are registered trademarks of IPFlex in Japan. Other corporate and product names are the trademarks or registered trademarks of their respective owners.

Information contained in press releases is up-to-date as of the date of release. Please note that, as such, it is subject to change without prior notice.

IPFlex Inc.

CONTACT: Miwa Sasaki, or Takashi Noto, Marketing Communication of IPFlexInc., +81-3-5739-3835, Fax: +81-3-5739-3831, info@ipflex.com

Web site: http://www.ipflex.com/

Source: PRNewswire

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