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Latest Automatic test pattern generation Stories

2014-04-30 08:41:19

Delivers 3X Higher Test Compression and Ease-of-Deployment MOUNTAIN VIEW, Calif., April 30, 2014 /PRNewswire/ -- Highlights: -- Dialog deployed DFTMAX Ultra on a mixed-signal IC in less than a day -- The device was manufactured and successfully tested for silicon defects -- Test time reduced by more than 3X Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that...

2010-10-26 08:00:00

MOUNTAIN VIEW, Calif., Oct. 26 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Realtek Semiconductor Corporation, one of the world's leading network and multimedia IC providers, deployed Synopsys power-aware test to avoid power issues during test and accelerate production testing of its new digital media processor. Excessive power consumption during manufacturing test leads to...

2010-09-08 08:00:00

MOUNTAIN VIEW, Calif., Sept. 8 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Silicon Image, Inc., a leading provider of semiconductors and IP for the secure distribution, presentation and storage of high-definition content, employed DFTMAX(TM) compression, an integral part of the Galaxy(TM) Implementation Platform, to significantly lower manufacturing test cost and time....

2009-11-03 08:00:00

MOUNTAIN VIEW, Calif., Nov. 3 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Arrow Electronics successfully deployed Synopsys' TetraMAX® automatic test pattern generation (ATPG) with multicore processing to significantly reduce the time needed to generate high-quality manufacturing tests. Stringent quality goals combined with increasing design...

2009-11-02 08:00:00

MOUNTAIN VIEW, Calif., Nov. 2 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced a new capability in DFTMAX(TM) compression that significantly reduces the cost of test for designs and methodologies that mandate very few test pins. Extending Synopsys' patented adaptive scan technology with a high-performance, low-pin interface to the tester allows designers to achieve...

2009-07-24 08:54:00

GENEVA, July 24 /PRNewswire-FirstCall/ -- STMicroelectronics (NYSE: STM), one of the world's most innovative semiconductor companies, will participate as presenter or co-author of several papers at the DAC 2009 (Design Automation Conference), which takes place from July 26-31, 2009, in San Francisco, California. ST's contributions to the conference cover advances in design methodologies and automation in the areas of 3-D stacking for complex SoC (System-on-Chip) ICs, physical- and...

2009-07-22 15:59:00

MOUNTAIN VIEW, Calif., July 22 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that the Galaxy(TM) Implementation Platform supports TSMC's 28-nanometer (nm) process technology with Reference Flow 10.0. Galaxy technologies featured in Reference Flow 10.0 include comprehensive 28-nm design rule support for place and route, interconnect process modeling and in-design...


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malpais
  • The ragged surface of a lava-flow.
'Malpais' translates from Spanish as 'bad land.'