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Last updated on May 20, 2013 at 5:30 EDT

Latest DDR SDRAM Stories

2013-02-28 12:30:23

WILMINGTON, Mass., Feb. 28, 2013 /PRNewswire/ -- Heilind Electronics, the largest distributor of interconnect products in North America, is now stocking DDR3 DIMM memory module sockets manufactured by Molex Incorporated. An established DDR DRAM interface technology, DDR3 sockets support data rates of 800 to 1600 Mbps with clock frequencies of 400 to 800 MHz, a doubling of speed compared to the DDR2. With a standard operating voltage of 1.5V, the DDR3 consumes 30 percent less power...

2012-03-14 08:00:00

SUNNYVALE, Calif., March 14, 2012 /PRNewswire/ -- Vivante Corporation, a worldwide leader in graphics and visualization technologies for handheld and consumer devices, today announced that it has worked with Cadence (NASDAQ: CDNS) to qualify the Cadence double data rate (DDR) Memory controller on-chip intellectual property (IP) solution for use with Vivante's graphics processing unit (GPU) IP solution. Vivante's high-performance multi-core GPUs are capable of processing massive...

2011-02-09 08:00:00

MOUNTAIN VIEW, Calif., Feb. 9, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the release of its enhanced DesignWare® Universal DDR Memory Controller, which delivers up to 30 percent lower latency and offers up to 15 percent higher throughput than the previous generation controller. The DDR Memory Controller offers new features such as high-priority bypass and configurable...

2011-01-26 08:00:00

MOUNTAIN VIEW, Calif., Jan. 26, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of the DesignWare® DDR PHY compiler, supporting DDR2, DDR3, LPDDR and LPDDR2 SDRAMs. The DesignWare DDR PHY compiler offers designers a web-based GUI to assemble a customized, high-performance DDR PHY for their system-on-chips (SoCs). The DesignWare DDR PHY compiler...

2010-04-28 08:00:00

MOUNTAIN VIEW, Calif., April 28 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of the high-performance DesignWare® Universal DDR Protocol and Memory Controllers, both supporting the DDR2, DDR3, Mobile DDR and LPDDR2 SDRAM standards. The DesignWare Universal Memory Controller helps reduce both the latency and silicon area by up to 50 percent compared to...

2010-04-14 14:26:00

SUNNYVALE, Calif., April 14 /PRNewswire/ -- Denali Software, Inc., a leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that Augusta Technology USA, a mobile digital solutions company, has selected Denali's Databahn(TM) LPDDR1-SDRAM controller and PHY intellectual property (IP) products for incorporation into its latest processor, designed using TSMC's Low Power (LP) process technology. The low-power processor solution enables...

2010-04-07 08:00:00

MOUNTAIN VIEW, Calif., April 7 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced availability of the DesignWare(TM) DDR multiPHY which is designed to support a broad range of DDR SDRAM standards in a single PHY without sacrificing power consumption or silicon area. These standards include LPDDR2, LPDDR/Mobile DDR, DDR3, DDR3L (1.35 V), DDR3U (1.2x V), and DDR2. The DesignWare...

2010-04-06 19:00:00

FREMONT, Calif., April 6 /PRNewswire-FirstCall/ -- Exar Corporation (Nasdaq: EXAR) unveiled today the XRP6142, the latest addition to its line of market proven low voltage step-down controllers specifically targeted at DDR memory power architectures. Supporting the memory reference voltage V(TTREF), the XRP6142 also provides either the memory buffer supply, V(DDQ), or the terminating voltage supply V(TT) for an optimized point-of-load solution for latest generation DDR memory requirements....

2010-03-24 04:30:00

SUNNYVALE, Calif., March 24 /PRNewswire/ -- Denali Software, Inc., a leading provider of intellectual property (IP) and electronic design automation (EDA) software, and Carbon Design Systems today announced a collaboration to provide designers with cycle-accurate models of Denali's configurable Databahn(TM) DDR SDRAM controller IP for virtual platforms. Databahn IP models are available today for use with leading system simulation environments (including Carbon SoC Designer, CoWare Platform...

2009-12-10 04:30:00

SUNNYVALE, Calif., Dec. 10 /PRNewswire/ -- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today revealed a new phase PHY technology for DDR SDRAM physical interfaces, delivering memory system performance up to 1066 MHz clock speeds (or DDR-2133 data rates) on 65-nanometer foundry process nodes or lower. Denali's phase PHY technology applies a high-speed oversampling architecture paired with per-bit data capture...