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Latest Integrated circuit design Stories

2014-05-20 04:21:50

SAN JOSE, Calif., May 20, 2014 /PRNewswire/ -- Cadence Design Systems, Inc., (NASDAQ: CDNS) a leader in global electronic design innovation, today announced that its high-performance FastSPICE simulator, Spectre® XPS (eXtensive Partitioning Simulator) now supports transistor-level mixed-signal design. Delivering up to 10X faster throughput versus previous advanced-SPICE solutions, Spectre XPS enables faster and more comprehensive simulation for large, complex designs including...

2014-05-20 04:21:49

SAN JOSE, Calif., May 20, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that CSR plc (LSE: CSR; NASDAQ: CSRE) selected the Cadence® Palladium® XP verification computing platform for system and early firmware validation of ARM®-based automotive infotainment systems-on-chip (SoCs). Using Palladium Hybrid technology, CSR experienced a 200X speed-up for OS bringup, which shaved months off the...

2014-05-15 12:42:06

Support for next-generation PCI Express architecture enables faster completion of functional verification of SoC designs SAN JOSE, Calif., May 15, 2014 /PRNewswire/ -- Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced the availability of the industry's first verification IP (VIP) supporting PCI Express® (PCIe®) 4.0 architecture. This VIP enables designers to quickly and thoroughly complete the functional verification for their...

2014-05-12 12:35:28

SAN JOSE, Calif., May 12, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that HiSilicon further expanded usage of the Cadence(®) Palladium(®) XP Verification Computing Platform as its emulation solution for mobile and digital media System-on-Chip (SoC) and ASIC development. http://photos.prnewswire.com/prnvar/20140102/SF39436LOGO HiSilicon provides ASICs and SoCs for communication network and...

2014-05-01 08:45:25

Achieves Higher Operating Frequencies and Smaller Area MOUNTAIN VIEW, Calif., May 1, 2014 /PRNewswire/ -- Highlights: -- Design Compiler Graphical delivers 10 percent faster timing and tight correlation to IC Compiler -- Mellanox widely deploys Design Compiler Graphical to achieve challenging design goals within schedule Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems,...

2014-04-30 08:41:19

Delivers 3X Higher Test Compression and Ease-of-Deployment MOUNTAIN VIEW, Calif., April 30, 2014 /PRNewswire/ -- Highlights: -- Dialog deployed DFTMAX Ultra on a mixed-signal IC in less than a day -- The device was manufactured and successfully tested for silicon defects -- Test time reduced by more than 3X Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that...

2014-04-28 08:39:23

Enables 2X Faster Implementation and Verification of Functional ECOs MOUNTAIN VIEW, Calif., April 28, 2014 /PRNewswire/ -- Highlights: -- Formality Ultra accelerates functional ECO cycles leading to weeks of schedule savings -- Centaur Technology deploys Formality Ultra on its x86 compatible microprocessor designs Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today...

2014-04-23 08:41:11

Prototyping Automation and Debug Software for HAPS FPGA-based Prototyping Systems Improves Prototyping Performance MOUNTAIN VIEW, Calif., April 23, 2014 /PRNewswire/ -- Highlights: -- ProtoCompiler software and integrated HAPS hardware accelerate time to prototype bring-up and improve prototype performance -- Automated partitioning capability across multiple FPGAs decreases runtime from hours to minutes for up to 250 million ASIC gate designs -- Enables...

2014-04-23 08:40:05

Collaboration Also Enables In-Design Physical Verification with IC Compiler MOUNTAIN VIEW, Calif. and HSINCHU, Taiwan, April 23, 2014 /PRNewswire/ -- Highlights: -- UMC extends existing support for Synopsys(®) IC Validator physical verification to 28 nm -- UMC support includes In-Design physical verification within Synopsys' IC Compiler((TM)) place-and-route tool, enabling advanced design techniques -- IC Validator DRC and LVS decks are available for immediate...

2014-04-21 16:26:47

HIGHLIGHTS: SAN JOSE, Calif., April 21, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ:CDNS), a leader in global electronic design innovation, today announced that it has entered into a definitive agreement to acquire Jasper Design Automation, Inc., a leading provider of formal analysis solutions, for approximately $170 million in cash. Jasper had approximately $24 million of cash, cash equivalents and short-term investments as of December 31, 2013....


Word of the Day
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  • Pertaining to the mythos of Cthulhu and additional otherworldly beings created by H. P. Lovecraft or inspired by his writings and imitators.
This word was invented in 1926 by H.P. Lovecraft for his short story, 'The Call of Cthulhu.' 'Cthulhu' may be based on the word 'chthonic,' which in Greek mythology refers to the underworld.
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