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Last updated on April 19, 2014 at 8:32 EDT

Latest Integrated circuit design Stories

2013-10-08 08:32:27

SHANGHAI, Oct. 8, 2013 /PRNewswire/ -- Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 981), China's largest and most advanced semiconductor foundry, today announced that its customers' bank card IC products adopting SMIC's eEEPROM platform have obtained China Union Pay certifications. SMIC's 0.18-micron eEEPROM technology is one of SMIC's differentiated offerings for mature process nodes. The platform is targeted at China's fast-growing dual-interface...

2013-10-04 08:25:28

SHANGHAI, Oct. 4, 2013 /PRNewswire/ -- Semiconductor Manufacturing International Corporation ("SMIC", NYSE: SMI and SEHK: 981), the largest and most advanced semiconductor foundry in mainland China, and Huada Empyrean Software Co. Ltc. ("Empyrean"), a global supplier of electronic design automation (EDA) and IP solutions, today jointly announced that SMIC's IP R&D center adopted Aeolus, a high-performance paralleled circuit simulation tool, along with other customized tools from...

2013-09-26 08:21:02

PITTSBURGH, Sept. 26, 2013 /PRNewswire/ -- ANSYS (NASDAQ: ANSS) subsidiary Apache Design announced today that its RedHawk(TM) and Totem(TM) products have completed methodology innovations to be included in TSMC's Reference Flow for 16nm FinFET technology, an advanced three-dimensional transistor architecture resulting in higher-performing and lower-power integrated circuits (ICs). This is an important milestone helping chip design teams to manage power integrity and electromigration...

2013-09-17 04:22:51

HSINCHU, Taiwan, R.O.C., Sept. 17, 2013 /PRNewswire/ --TSMC (TWSE: 2330, NYSE: TSM) today released three silicon-validated Reference Flows within the Open Innovation Platform(®) (OIP) that enable 16FinFET systems-on-chip (SoC) designs and 3D chip stacking packages. Leading Electronic Design Automation (EDA) vendors collaborated with TSMC to develop and validate all these flows through multiple silicon test vehicles. The new Reference Flows are: 1. TSMC's 16FinFET Digital Reference...

2013-09-11 08:35:19

Micrologic's Software New Release - FinFET Newest Technology Supported LOS ANGELES, Sept. 11, 2013 /PRNewswire/ -- Micrologic Design Automation, Inc. ("MDA"), a leader in software development for electronic manufacturers, today announced the new release of its nanoRV tool for enhanced reliability and performance of custom and semi-custom integrated circuit (IC) layouts. MDA specializes in development of interactive software tools and online verification software to enhance the...

2013-09-09 08:33:37

Significantly Reduces Test Integration Time and Improves Test QoR for Hierarchical SoCs MOUNTAIN VIEW, Calif., Sept. 9, 2013 /PRNewswire/ -- Highlights: -- Increase design and design-for-test (DFT) productivity with automatic test integration and validation of system-on-chip (SoC), including analog/mixed-signal IP, digital logic blocks, memory and interface IP -- Optimize test time and power consumption with dynamic parallel and serial test scheduling --...

2013-09-09 08:33:36

Customers Realizing Up to 3x Higher Compression with Fewer Test Pins MOUNTAIN VIEW, Calif., Sept. 9, 2013 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced its DFTMAX(TM) Ultra product, part of Synopsys' synthesis-based test solution, that significantly reduces silicon test cost. Embedded in Design Compiler® RTL synthesis and incorporating recently unveiled...

2013-09-04 08:34:52

SAN JOSE, Calif., Sept. 4, 2013 /PRNewswire/ -- Highlights: -- SMIC's new 40nm Reference Flow 5.1 incorporates the state-of-the-art Cadence CCOpt and GigaOpt technology and the Tempus Timing Signoff Solution -- The new RTL-to-GDSII digital flow supports the Cadence hierarchical low-power flow and the latest version of the Common Power Format (CPF) Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, and...

2013-09-03 08:33:15

Achieves Area and Power Reduction Critical to Success in the Mobile Market MOUNTAIN VIEW, Calif., Sept. 3, 2013 /PRNewswire/ -- Highlights: -- Broad deployment of Design Compiler Graphical for Samsung Mobile SoCs -- Reduced routing congestion leads to 10 percent smaller area for highly congested blocks -- Minimal use of Low-Vt cells reduces leakage power while meeting frequency goals -- Congestion optimization and physical guidance to IC Compiler deliver...

2013-08-19 08:33:49

Arteris NoC technology used by four of the top five Chinese fabless semiconductor OEMs SUNNYVALE, Calif., Aug. 19, 2013 /PRNewswire/ -- Arteris, Inc., the inventor and only supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced that its interconnect fabric IP has been licensed and deployed in a majority of chips developed by China's leading semiconductor companies for applications including consumer electronics, smartphones, and tablets. Based...