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Latest Logic synthesis Stories

2014-09-26 16:25:34

WILSONVILLE, Ore., Sept. 26, 2014 /PRNewswire/ -- Mentor Graphics Corp. (NA­SDAQ: MENT) today announced that it has entered 10nm collaboration with TSMC. Physical design, analysis, verification and optimization tools have been enhanced to meet 10nm FinFET process requirements for early customers' test chip and IP design starts. The infrastructure includes the Olympus-SoC(TM) digital design system, the Analog FastSPICE (AFS(TM)) Platform including AFS Mega, and the Calibre® signoff...

2014-09-25 08:32:54

Certification of Digital and Custom Tools Enables Early Adopters to Realize QoR Benefits of the New Processes MOUNTAIN VIEW, Calif., Sept. 25, 2014 /PRNewswire/ -- Highlights: -- Digital and custom tools from Galaxy((TM)) Design Platform are ready for TSMC 10-nm FinFET and 16-nm FinFET+ processes -- Successful 10-nm digital design flow pipe-cleaning using the Galaxy Design Platform on ARM(®) Cortex(®)-A15 MPCore((TM)) processor -- TSMC 16-nm FinFET+ Reference...

2014-09-15 08:35:30

Selection of Synopsys' Solutions Based on Superior Results for Analog Mixed-signal Designs MOUNTAIN VIEW, Calif., Sept. 15, 2014 /PRNewswire/ -- Highlights of Benefits Realized by Elmos: -- Higher productivity with unified custom and digital co-design implementation solution -- Up to 10X faster mixed-signal verification -- Up to 10 percent smaller area and better silicon correlation Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used...

2014-07-30 12:34:34

Encounter RTL Compiler and Encounter Test also reduced test pattern count by 10 percent on Bluetooth wireless radio chip SAN JOSE, Calif., July 30, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Airoha Technology Corp. adopted the Cadence® Encounter® RTL Compiler and Cadence Encounter Test solutions after a rigorous competitive evaluation, and achieved a 15 percent reduction in power...

2014-07-15 12:34:27

Ricoh Adopts Cadence Extraction Solution for All Complex Digital and Mixed Signal Designs SAN JOSE, Calif., July 15, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Ricoh Corporation, Ltd. implemented Cadence® Quantus(TM) QRC Extraction Solution after a rigorous competitive evaluation. By using Cadence's next-generation parasitic extraction solution for all large-scale, complex digital designs...

2014-05-29 12:32:49

SAN JOSE, Calif., May 29, 2014 /PRNewswire/ -- WHO: Cadence Design Systems, Inc. (NASDAQ:CDNS), a leader in global electronic design innovation, is scheduled to demonstrate the latest advancements and solutions to key technology challenges, solved in collaboration with customers and partners, at Design Automation Conference (DAC) 2014. WHEN: Sunday, June 1, through Thursday, June 5, 2014 WHERE: DAC 2014 will take place at the South Hall of Moscone Center in San Francisco, CA. Cadence is...

2014-05-20 04:21:49

SAN JOSE, Calif., May 20, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that CSR plc (LSE: CSR; NASDAQ: CSRE) selected the Cadence® Palladium® XP verification computing platform for system and early firmware validation of ARM®-based automotive infotainment systems-on-chip (SoCs). Using Palladium Hybrid technology, CSR experienced a 200X speed-up for OS bringup, which shaved months off the...

2014-04-23 08:41:11

Prototyping Automation and Debug Software for HAPS FPGA-based Prototyping Systems Improves Prototyping Performance MOUNTAIN VIEW, Calif., April 23, 2014 /PRNewswire/ -- Highlights: -- ProtoCompiler software and integrated HAPS hardware accelerate time to prototype bring-up and improve prototype performance -- Automated partitioning capability across multiple FPGAs decreases runtime from hours to minutes for up to 250 million ASIC gate designs -- Enables...


Word of the Day
caparison
  • A cloth or covering, more or less ornamented, laid over the saddle or furniture of a horse, especially of a sumpter-horse or horse of state.
  • Clothing, especially sumptuous clothing; equipment; outfit.
  • To cover with a caparison, as a horse.
  • To dress sumptuously; adorn with rich dress.
This word ultimately comes from the Medieval Latin 'cappa,' cloak.
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