Latest Multigate device Stories
MOUNTAIN VIEW, Calif., Dec. 20, 2012 /PRNewswire/ -- Highlights: Milestone helps accelerate adoption of FinFET technology for faster and more power efficient Systems on Chips (SoC)s Collaboration delivers foundation for 3D device modeling and physical design rule support Test chip qualifies FinFET process and Synopsys(®) DesignWare(®) Embedded Memories Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips...
LEUVEN, Belgium, and MOUNTAIN VIEW, Calif., Dec. 12, 2012 /PRNewswire/ -- Imec, the Belgian nanoelectronics research center, and Synopsys, Inc. (Nasdaq:SNPS), a global leader accelerating innovation in the design, verification and manufacturing of chips and systems, today announced that they have expanded their collaboration in the field of Technology Computer Aided Design (TCAD) to next-generation FinFET technology at 10 nm. The collaboration builds on extensive work done at 14 nm...
HSINCHU, Taiwan and CAMBRIDGE, UK, July 23, 2012 /PRNewswire/ -- TSMC (TWSE: 2330, NYSE: TSM) and ARM today announced a multi-year agreement extending their collaboration beyond 20-nanometer (nm) technology to deliver ARM processors on FinFET transistors, enabling the fabless industry to extend its market leadership in application processors. The collaboration will optimize the next generation of 64-bit ARM® processors based on the ARMv8 architecture, ARM Artisan® physical...
ST. PETERS, Mo., July 6, 2012 /PRNewswire/ -- MEMC Electronic Materials, Inc. (NYSE: WFR) announced today the introduction of MEMC FOX-Si, an innovative and cost-effective silicon wafer designed specifically for delivering advanced FinFET technology with oxide dielectric isolation (FOX). A key approach for designing transistors below 32 nanometers is a "fin-based" multigate design, or FinFET, in which the conducting channel is wrapped by a thin silicon "fin" forming the body of the...
HSINCHU, Taiwan, June 29, 2012 /PRNewswire-Asia/ -- United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) ("UMC"), a leading global semiconductor foundry, today announced that it has licensed IBM technology to expedite the development of the foundry's next generation 20nm CMOS process with FinFET 3D transistors. Under the terms of the agreement, IBM will license its 20nm process design kit and FinFET technology to UMC so the foundry can use these technologies in order to...
BERNIN, France and PEABODY, Massachusetts, April 16, 2012 /PRNewswire/ -- With chip makers racing to develop the next generation of faster, more power-efficient processors - and the market demanding they do it more quickly than ever despite soaring development costs - Soitec (Euronext) announced today [http://soitec.com/en/news/press-releases ] a comprehensive product roadmap centered on fully depleted (FD) silicon technology starting at 28nm and extending down to the 10nm...
BERNIN, France and PEABODY, Massachusetts, April 16, 2012 /PRNewswire/ -- Soitec (Euronext), a world leader in generating and manufacturing revolutionary semiconductor materials for the electronics and energy industries, announced today its fully depleted (FD) product roadmap comprising two products designed for both planar and three-dimensional (FinFET) approaches to building transistors. Available now, FD wafers from Soitec, pre-integrate critical characteristics of the...
BERNIN, France, March 12, 2012 /PRNewswire/ -- Soitec (Euronext), a world leader in generating and manufacturing revolutionary semiconductor materials for the electronics and energy industries, announced today that ST-Ericsson, a leader in wireless platforms and semiconductors, has selected planar fully depleted silicon on insulator (FD-SOI) technology for use in future mobile platforms. Soitec's innovative substrates - with an extremely thin top layer which predefines...
SANTA CLARA, Calif., Feb. 21, 2012 /PRNewswire/ -- Ethernet Technology Summit -- Tabula Inc., advancing programmable logic solutions for network infrastructure systems, today confirmed previous speculation that it is implementing a family of 3PLD products manufactured by Intel using its advanced 22nm manufacturing process featuring 3-D Tri-Gate transistors and co-optimized packaging technology. This is made possible by a manufacturing access agreement between Tabula Inc., and Intel...
BOSTON, Massachusetts, February 6, 2012 /PRNewswire/ -- The sixth annual workshop on fully depleted silicon-on-insulator (FD-SOI) technology for advanced semiconductor architectures, featuring technical presentations and discussions among industry peers, will be held on February 24 at the Marriott Marquis Hotel in San Francisco, Calif. This forum, jointly organized by the SOI Industry Consortium, CEA-Leti and Soitec, provides semiconductor IC designers and manufacturers with...
