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Latest Semiconductor intellectual property core Stories

2014-07-02 12:32:42

DUBLIN, July 2, 2014 /PRNewswire/ -- Research and Markets (http://www.researchandmarkets.com/research/8gwk4v/semiconductor) has announced the addition of the "Semiconductor (Silicon) IP Market by Form Factor, Design Architecture, Processor Type, Application, Geography and Verification IP - Forecast & Analysis to 2013 - 2020" report to their offering. http://photos.prnewswire.com/prnh/20130307/600769 In the semiconductors and electronics sector, a semiconductor intellectual property core...

2014-06-24 08:38:55

Production-Ready DesignWare IP for TSMC 28HPC Process Enables Designers to Reduce Power Consumption and Area for Mobile and Ultra Low-Power IoT Designs MOUNTAIN VIEW, Calif., June 24, 2014 /PRNewswire/ -- Highlights: -- Synopsys DesignWare® IP portfolio for TSMC 28HPC includes interface, analog, embedded memory and logic library IP -- Production-ready IP portfolio enables fast time-to-market by leveraging compatibility with silicon-proven DesignWare IP for TSMC...

2014-06-23 08:34:36

Deployment-ready Solution Built with Altera's Interlaken Look-Aside IP and Cavium's NEURON Search Processor SAN JOSE, Calif., June 23, 2014 /PRNewswire/ -- Altera Corporation (NASDAQ: ALTR) today announced its Interlaken Look-Aside intellectual property (IP) core has been tested and is compatible with Cavium's NEURON Search(TM) Processor. This deployment-ready, pre-verified solution provides networking OEMs a low-latency, high-performance packet interface for use in networking...

2014-06-02 12:32:50

FinFET-ready Silicon-proven Tools and IP Available for Immediate Design of SoCs MOUNTAIN VIEW, Calif., June 2, 2014 /PRNewswire/ -- Highlights: -- Galaxy Design Platform certified for Samsung's 14-nm FinFET process, including Process Design Kit (PDK) for Samsung's foundry customers -- Silicon-proven DesignWare IP available now for Samsung's 14-nm FinFET process -- Design and IP solution deployed on 14-nm FinFET SoC product designs...

2014-06-02 08:36:38

New DesignWare IP Development Kits and Customized Subsystems Accelerate Prototyping, Software Development and Integration of IP into SoCs MOUNTAIN VIEW, Calif., June 2, 2014 /PRNewswire/ -- Highlights: -- The IP Accelerated initiative augments Synopsys' leading IP portfolio with new IP prototyping kits, software development kits and customized IP subsystems -- The DesignWare IP Prototyping Kits include a proven reference design for the IP preloaded onto a...

2014-05-29 23:00:50

Arasan’s NAND Flash Controller IP and NV-DDR2 PHY achieve 533 MB/s enabling high performance storage devices. San Jose, CA (PRWEB) May 29, 2014 Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions for mobile and storage applications, announces today the availability of ONFI 3.2 NAND Flash Controller IP & PHY, including ONFI 3.2 compatible NV-DDR2 I/O pads, providing 533 MB/s performance. To meet the ever increasing demand of faster data transfer rates...

2014-05-27 23:06:12

Arasan’s MIPI D-PHY, M-PHY and USB 2.0 Mobile IP Solutions will be on display in booth #716 and the Hot IP Track at DAC June 2-4, 2014 in Moscone Center, San Francisco, CA. San Jose, CA. (PRWEB) May 27, 2014 MIPI-PHY IP Arasan is a leader in providing silicon proven MIPI IP cores to system companies for mobile connectivity and storage. MIPI D-PHY and CSI for camera interface, and MIPI D-PHY and DSI for display interface, are mobile industry standards. MIPI M-PHY for Universal Flash...

2014-05-27 12:36:33

USB Design IP is Used in Industry Standard Compliance Program SAN JOSE, Calif., May 27, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that a production proven host controller intellectual property (IP) for USB 3.0 has been added to the Cadence IP offering. The Cadence® USB 3.0 xHCI host controller IP was originally developed by Fresco Logic, a global fabless semiconductor company that develops and...

2014-05-27 08:34:58

Silicon Success of DesignWare USB 3.0 femtoPHY, Logic Libraries and Embedded Memories in TSMC 16-nm FinFET Process Verifies Robustness of Both IP and Process MOUNTAIN VIEW, Calif., May 27, 2014 /PRNewswire/ -- Highlights: -- Validated IP in TSMC 16-nm FinFET process accelerates 16-nm FinFET Plus (16FF+) IP development and reduces SoC integration risk -- Portfolio of IP under development for TSMC 16FF+ process includes DesignWare Interface, Logic Library and Embedded...

2014-05-19 08:31:59

New SonicsStudio® Director GUI Improves Designer Productivity and Quality of Results MILPITAS, Calif., May 19, 2014 /PRNewswire/ -- Sonics, Inc., the world's foremost supplier of on-chip network (NoC) technologies and services, today introduced its next-generation SonicsStudio development environment that addresses the integration challenges of complex system-on-chip (SoC) designs that include multiple processor and intellectual property (IP) cores. Central to this environment is...


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