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Last updated on April 16, 2014 at 17:34 EDT

Latest Semiconductor intellectual property core Stories

2013-10-07 23:23:35

Arasan Leads Industry with M-PHY-based Analog Interfaces for Low Power Mobile Storage San Jose, California (PRWEB) October 07, 2013 Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions for mobile applications, today announced the availability of the industry’s first MIPI® M-PHY® 3.0-compliant IP supporting multiple speed gears and a broad range of high-speed interfaces for mobile applications. Arasan’s MIPI M-PHY version 3.0 multi-gear analog...

2013-10-07 08:28:56

FPGA Technology Enables the Deployment of Cost-effective, High-capacity Base Station Equipment Using Cloud-based C-RAN Architecture SAN JOSE, Calif., Oct. 7, 2013 /PRNewswire/ -- Altera Corporation (Nasdaq: ALTR) today announced its collaboration with China Mobile Research Institute (CMRI) to research and develop next-generation wireless networks based on the Centralized Radio Access Network (C-RAN) architecture. Altera FPGAs and intellectual property (IP) provide CMRI's wireless...

2013-09-30 08:34:25

Expanded Portfolio of IP Cores Enhanced with 15 Percent Timing Margin for Faster Design Integration SAN JOSE, Calif., Sept. 30, 2013 /PRNewswire/ -- Altera Corporation (Nasdaq: ALTR) today announced it has completed the latest upgrade to its portfolio of IP cores targeting 28 nm FPGAs and SoCs. Over the past year, Altera has released more than 15 new protocol interface IP cores that target a broad range of applications and markets. In addition, the IP cores in Altera's expanded IP portfolio...

2013-09-19 08:33:30

Silicon-proven Synopsys IP Portfolio on TSMC's 20SoC Process Technology Enables Designers to Reduce Power Consumption and Increase Performance for Mobile and Multimedia SoC Designs MOUNTAIN VIEW, Calif., Sept. 19, 2013 /PRNewswire/ -- Highlights: -- Synopsys's DesignWare® IP portfolio for TSMC 20SoC includes USB, DDR, PCI Express®, and MIPI® PHY IP -- Silicon-proven IP portfolio has been designed into multiple customers' SoCs which are ramping to production now...

2013-09-17 08:39:38

MILPITAS, Calif., Sept. 17, 2013 /PRNewswire/ -- Mobiveil, a leading silicon intellectual property and subsystem based solutions provider, today announced the appointment of Mr. Dale Olstinske as the new Vice President of Sales. In his new role, Olstinske will drive Mobiveil's worldwide semiconductor IP sales to further accelerate company's revenue growth. Dale is a seasoned sales professional who brings 35 years of semiconductor industry experience having served in leadership roles...

2013-09-11 08:34:33

Successful SSIC Interoperability Reduces Integration Risk and Speeds Time-to-Market for Mobile and Wireless Designs MOUNTAIN VIEW, Calif., Sept. 11, 2013 /PRNewswire/ -- Highlights: -- Synopsys demonstrates industry's first SSIC interoperability at Intel Developer Forum 2013, September 10-12 in San Francisco, Calif. -- Demonstration shows DesignWare USB 3.0 IP for SSIC transferring data to and from an Intel SSIC development platform -- Implementing SSIC...

2013-09-09 08:33:37

Significantly Reduces Test Integration Time and Improves Test QoR for Hierarchical SoCs MOUNTAIN VIEW, Calif., Sept. 9, 2013 /PRNewswire/ -- Highlights: -- Increase design and design-for-test (DFT) productivity with automatic test integration and validation of system-on-chip (SoC), including analog/mixed-signal IP, digital logic blocks, memory and interface IP -- Optimize test time and power consumption with dynamic parallel and serial test scheduling --...

2013-08-01 23:26:20

Answering the call for improved productivity and reduced cost in the development of complex airborne electronic hardware, Logicircuit, Inc. announces an extensive, and growing, catalog of soft IP targeting DO-254 compliant designs. ALPHARETTA, GA (PRWEB) August 01, 2013 Logicircuit, a leading DO-254 services company, today announced the availability of the industry’s most extensive DO-254 certifiable intellectual property (IP) portfolio, headlined by the Xilinx MicroBlaze™ soft...

2013-08-01 12:32:42

August software release features SystemVerilog support, DSP IP and new design examples SANTA CLARA, Calif., Aug. 1, 2013 /PRNewswire/ -- In a continuing move to help make network infrastructure systems more responsive to applications' dynamic needs, Tabula, Inc. announced today the availability of version 2.7.1 of its Stylus® compiler supporting its ABAX®2 P-Series of 3D programmable logic devices (3PLDs). Stylus 2.7.1 further eases design of complex high-bandwidth systems with...

2013-07-30 08:42:36

Configurable Hardware and Software IP Solution Enables Rapid Integration of Sensor Functionality into SoCs MOUNTAIN VIEW, Calif., July 30, 2013 /PRNewswire/ -- Highlights: Integrated, pre-verified hardware and software IP subsystem consisting of a power- and area-efficient ARC 32-bit processor, digital and analog interfaces, hardware accelerators, software library of DSP functions and I/O software drivers Highly configurable with tightly integrated peripherals and dedicated...