Latest Semiconductor intellectual property core Stories
32- and 64-MAC baseband DSP IP cores offer higher performance at lower power and area for 3G/4G LTE-Advanced, WiFi 80211.ac and HDTV demodulation SAN JOSE, Calif., Feb.
Altera Optimizes QAM Modem IP from Escape Communications to Offer a Field-Upgradable, Flexible, Cost-Effective Solution for Current and Future Wireless Networks SAN JOSE, Calif.,
Software release features new 100G reference designs SANTA CLARA, Calif., Feb.
Integrated Audio Processing Solution Includes Proven Voice Enhancement Technologies that Speed Time-to-Market for Developers of Mobile and Stationary Communication SoCs MOUNTAIN VIEW, Calif.,
Arasan’s D-PHY Prototype Module can be used for development and/or validation of devices and hosts, complying with the D-PHY standard specification version 1.1. San
Expedites CEVA's Implementation of its DSPs by Simplifying the Back-end Flow with Highly Predictable Results MOUNTAIN VIEW, Calif., Jan.
Solution Includes Certification, Reference Design and Development Kit for Company's Mainstream SmartFusion2 SoC FPGA and IGLOO2 FPGA Families ALISO VIEJO, Calif., Jan.
CAMPBELL, Calif., Jan.
Arasan’s Total IP Solution for 64-bit processors, such as the ARMv8, provides support for SD, eMMC, ONFI and UFS mobile storage controllers in 32-bit or 64-bit bus configurations.