Latest Synopsys Inc. Stories
Silicon-Proven PCI Express 3.0 Digital Controller and PHY IP Solution Lowers Integration Risk for SoC Designs MOUNTAIN VIEW, Calif., May 17, 2013 /PRNewswire/ -- Highlights: Synopsys' DesignWare digital controller and PHY IP for PCI Express 3.0 passed PCI-SIG®'s three required Gold Tests and completed interoperability with more than the requisite 80 percent of the devices at the workshop Complete PCI Express 3.0 solution, including PHY, controller and verification IP, reduces...
Synopsys Uniquely Proven for the Emerging New Wave of FinFET-based Process Technology MOUNTAIN VIEW, Calif., May 13, 2013 /PRNewswire/ -- Highlights Achronix standardizes on Synopsys' IC Complier for design, and IC Validator for verification Synopsys tools used in production for first commercial FinFET-based design Latest tool enhancements enable support for all emerging FinFET requirements Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used...
MOUNTAIN VIEW, Calif., May 8, 2013 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced it will report results for the second quarter fiscal year 2013 on Wednesday, May 22, 2013, after the market close. A conference call to review the results will begin at 2:00 p.m. PT (5:00 p.m. ET) and will be hosted by Aart de Geus, chairman and co-chief executive officer, and...
Latest IC Compiler Innovations Meet Performance Targets on Time MOUNTAIN VIEW, Calif., May 8, 2013 /PRNewswire/ -- Highlights: HiSilicon taped out a 50+ million instance ARM(®) Cortex(TM)-A15 processor-based system-on-a-chip (SoC) Improved clock speed by 100 MHz through IC Compiler(TM) multisource clock tree synthesis (CTS) technology Reduced leakage power by 10% to 20% on power-sensitive blocks with IC Compiler final-stage leakage recovery Accelerated timing closure with...
New Innovations Address ECO Closure, High-speed Design and Emerging Process Nodes MOUNTAIN VIEW, Calif., May 6, 2013 /PRNewswire/ -- Highlights: Innovative new technologies including minimum physical impact ECO and fully incremental In-Design physical verification speed up design closure for all process nodes Concurrent clock and data optimization enables faster timing closure on high-speed designs Provides full, color-ready place-and-route and tapeout-proven FinFET support for...
New VDK Enables Automotive Suppliers and OEMs to Start Software Development Prior to ECU Board Availability MOUNTAIN VIEW, Calif., April 29, 2013 /PRNewswire/ -- Highlights: New VDK accelerates software development, system integration and test, fault and coverage testing Synopsys® VDK includes virtual prototype of the Freescale® Qorivva® MPC5643L MCU, extendable to support all Qorivva MCUs Seamless integration with tools such as Mathworks' Simulink, Synopsys' Saber and...
Reduces Development Time for Power- and Performance-Optimized Application-Specific Processors from Months to Weeks MOUNTAIN VIEW, Calif., April 25, 2013 /PRNewswire/ -- Highlights Accelerate development of application-specific processors for embedded vision applications by taking advantage of Synopsys® Processor Designer (TM) tool set, processor examples and pre-verified design methodologies Explore new processor architectures tailored to embedded vision requirements in hours...
Synopsys IC Validator Enables LG Electronics to Accelerate Manufacturing Compliance MOUNTAIN VIEW, Calif., April 15, 2013 /PRNewswire/ -- Highlights Synopsys' In-Design physical verification with IC Validator and IC Compiler place-and-route solution accelerates LG Electronics' manufacturing closure by two weeks Multiple successful tapeouts using In-Design physical verification demonstrate accelerated manufacturing closure for high-performance core design LG Electronics has...
DesignWare MIPI IP Enables Silicon and Commercial Success of High-Performance, Low-Power Baseband Processor MOUNTAIN VIEW, Calif., April 9, 2013 /PRNewswire/ -- Highlights: Fujitsu Semiconductor achieved silicon success and compliance with the latest DigRFv4 standard using Synopsys' DesignWare(®) MIPI M-PHY IP DesignWare MIPI M-PHY's proven interoperability between DigRFv4 interface on the baseband side and Fujitsu Semiconductor's radio frequency integrated circuit (RFIC) helped...
New technology can significantly reduce signoff iterations at advanced nodes MOUNTAIN VIEW, Calif., March 25, 2013 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the immediate availability of its PrimeTime® ADV solution, a new configuration of its market-leading PrimeTime static timing analysis and signoff product. PrimeTime ADV includes advanced...
