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Latest Timing closure Stories

2011-04-19 08:00:00

MOUNTAIN VIEW, Calif., April 19, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Exar Corporation, a provider of software and subsystem solutions for industrial, datacom and storage applications, has broadly deployed Synopsys' Design Compiler® Graphical RTL Synthesis solution, a key component of the Galaxy(TM) Implementation Platform, to shorten its IC...

2011-01-31 08:00:00

MOUNTAIN VIEW, Calif., Jan. 31, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the 2010.12 release of its Galaxy(TM) Implementation Platform, delivering new technologies to address the scalability, convergence and throughput needs of "Gigascale" design. Faster runtime performance with multicore processing and innovations to increase design capacity throughout the Galaxy Platform...

2011-01-28 08:00:00

SANTA CLARA, Calif., Jan. 28, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, will showcase its latest DesignWare® DDR PHY Compiler, Synplify® FPGA design tools, HAPS® FPGA-based prototyping platform, and HSPICE® solutions at DesignCon 2011 in Santa Clara, California on February 1-2, 2011. See live demonstrations, speak with...

2010-06-14 07:55:00

MOUNTAIN VIEW, Calif., June 14 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today unveiled new PrimeTime® HyperScale technology that enables static timing analysis (STA) to scale beyond 500 million instances. PrimeTime HyperScale technology provides design engineers the insight required to solve many of the timing integration and closure problems they face with today's...

2010-06-14 07:50:00

MOUNTAIN VIEW, Calif., June 14 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced its Galaxy Characterization Solution. The Galaxy Characterization Solution is a comprehensive suite of tools architected to generate compact, highly-accurate libraries for the design and implementation of complex system-on-chips (SoCs). Today's SoCs require libraries that contain hundreds of...

2010-02-09 08:00:00

MOUNTAIN VIEW, Calif., Feb. 9 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Yamaha, a leading provider of mobile audio and Graphics LSI chip products, achieved their aggressive performance targets ahead of schedule with Design Compiler® Graphical and successfully taped out their latest Graphics LSI chip. Traditionally, time-consuming iterations...

2010-01-28 08:00:00

SANTA CLARA, Calif., Jan. 28 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, will be demonstrating its DesignWare® IP solutions for SuperSpeed USB 3.0, DDR and PCI Express® 3.0 at DesignCon 2010 in Santa Clara, California on February 2-3, 2010. DesignCon® is the definitive event for electronic design experts spanning chip, package,...

2009-12-07 08:00:00

MOUNTAIN VIEW, Calif., Dec. 7 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Hisilicon Technologies Co., Ltd., a worldwide provider of ASICs and solutions for communication network and digital media, and a subsidiary of Huawei Technologies, has established Synopsys as its primary EDA partner across its implementation and verification design flows. Hisilicon has signed...

2009-05-11 08:00:00

TSMC Includes IC Validator in EDA Qualification Program for 28nm MOUNTAIN VIEW, Calif., May 11 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the IC Validator DRC/LVS solution for in-design physical verification and signoff for advanced designs at 45 nanometer (nm) and below. Architected to deliver the high accuracy necessary for leading-edge process nodes, superior scalability for...

2009-04-14 08:00:00

PrimeTime Technology Brings Margin Reduction Benefits to Broader Range of Customers and Process Technologies MOUNTAIN VIEW, Calif., April 14 /PRNewswire-FirstCall/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Renesas Technology Corp. has deployed Synopsys' PrimeTime(R) advanced on-chip variation (OCV) capability to help accelerate timing closure for 65-nanometer (nm) and below system-on-chip (SoC)...


Word of the Day
maffling
  • To stammer.
  • Present participle of maffle, to stammer.
  • A simpleton.
The word 'maffle' may come from a Dutch word meaning 'to move the jaws' or a French word meaning 'having large cheeks'.