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Latest Verilog Stories

2014-03-25 08:37:17

Initial Components of Initiative Extend Proven Verification Methodology and Technologies for Mixed-Signal Applications MOUNTAIN VIEW, Calif., March 25, 2014 /PRNewswire/ -- Highlights: -- Proven verification methodology extended for mixed-signal SoCs to enable rapid deployment of constrained-random testbenches in a regression environment -- Advanced functional and low-power verification technologies increase performance and effectiveness of mixed-signal SoC...

2014-01-13 08:34:47

SAN JOSE, Calif., Jan. 13, 2014 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today introduced a new version of the Incisive® functional verification platform, once again setting a new standard for overall verification performance and productivity. Addressing both intellectual property (IP) block-to-chip and system-on-chip (SoC) verification challenges, the Incisive 13.2 platform offers orders of magnitude faster performance with two new engines and additional automation...

2013-09-04 23:04:53

#1 Verilog Book in Amazon - The best practical Verilog digital design book for college students as well as working professionals. http://www.amazon.com/Advanced-Design-Practical-Examples-Verilog/dp/1482593335/ref=sr_1_9?s=books&ie=UTF8&qid=1367819620&sr=1-9&keywords=verilog (PRWEB) September 04, 2013 “Designing a complex ASIC/SoC is similar to learning a language well and then creating a masterpiece using experience, imagination, and creativity. Digital design starts...

2013-08-01 12:32:42

August software release features SystemVerilog support, DSP IP and new design examples SANTA CLARA, Calif., Aug. 1, 2013 /PRNewswire/ -- In a continuing move to help make network infrastructure systems more responsive to applications' dynamic needs, Tabula, Inc. announced today the availability of version 2.7.1 of its Stylus® compiler supporting its ABAX®2 P-Series of 3D programmable logic devices (3PLDs). Stylus 2.7.1 further eases design of complex high-bandwidth systems with...

2013-07-11 00:20:28

New features provide unique FST wave form dumping and toggle coverage MINNEAPOLIS, July 10, 2013 /PRNewswire/ -- Tachyon Design Automation today announced a major release 6.5 of CVC compiled Verilog simulator. CVC 6.5 adds precisely controllable net toggle recording and reporting along with simplified test bench toggle result merging. Capacity and speed of value change dumping to FST format value change files (supported by the GTKWave wave form viewer) has been improved so that wave...

2012-08-08 02:31:09

MOUNTAIN VIEW, Calif., Aug. 8, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the launch of VIP-Central.org, the first industry-wide, technical community site focused on system-on-chip (SoC) verification engineers and users of verification IP (VIP). The site provides a centralized online resource of relevant forums and blogs focused on verification of...

2012-05-24 02:31:42

MOUNTAIN VIEW, Calif., May 24, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, announced that Accellera Systems Initiative will receive Synopsys' twelfth annual Tenzing Norgay Interoperability Achievement Award for advancing industry standards that enable interoperable system design flows. The Accellera Systems Initiative was formed in December 2011 through the merger of Open SystemC Initiative...

2012-03-22 02:29:29

MOUNTAIN VIEW, Calif., March 22, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced availability of verification IP (VIP) for Non-Volatile Memory Express (NVMe), an emerging storage protocol for connecting solid state drives (SSDs) directly to the PCI Express® interface. With the addition of the NVM Express protocol to its leading serial ATA...

2012-02-27 08:00:00

MOUNTAIN VIEW, Calif., Feb. 27, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today unveiled its Discovery(TM) Verification IP (VIP) family based on the new VIPER architecture. Written entirely in SystemVerilog with native support for the UVM, VMM and OVM methodologies, Discovery VIP provides inherent performance, ease-of-use and extensibility to speed and simplify...

2012-02-14 11:13:00

NEW YORK, Feb. 14, 2012 /PRNewswire/ -- Vook, the leading ePublishing technology platform that's produced over 1,250 eBooks leading to 3.3 million downloads, today announced winners of the eBook Creation Contest for its closed beta users, who have produced more than 584 unique eBooks in the platform. The winner of the "Best Overall eBook" was Brian Brushwood's "Scam School: Volume 1," a collection of a magician's best tricks and cons. User Joey O'Connor of the The Grove Center for the Arts...